(i) Field of the Invention
The present invention relates to a tape carrier semiconductor device, and, more particularly, to a tape carrier semiconductor device of a smaller external size capable of higher density mounting of semiconductor devices.
(ii) Description of the Related Art
Heretofore, encapsulation resins for tape carrier semiconductor devices have been selected with priority being given to thinning the thickness of the resin applied to the semiconductor devices. With respect to the viscosity of the resin, liquid resins having a viscosity ranging from 100 to cps are widely used. The device hole size is usually equal to the chip size plus 0.6-1.0 mm. The size of the resulting resin encapsulated area is about the chip size plus 4-5 mm.
A technique capable of controlling the size of the resin encapsulated area to a range of the chip size plus 1-2 mm has not yet been available.
The size of a resin encapsulated area is mostly left to natural phenomena, e.g., after pouring an encapsulation resin, the natural extension of the encapsulation resin is allowed until the natural extension stops.
The viscosity of liquid resins used heretofore is so low that the area covered by the encapsulation resin extends too widely and its size is difficult to control.
Even if the resin viscosity is raised, the encapsulated area can not be controlled to a desired size, and conversely, LSI chips can not be fully covered so that there is a reliability problem.
For the purpose of controlling the size of a resin encapsulated area, there is a method of printing a paste encapsulation resin on the device. Although this method can control the resin encapsulated area at the side of the chip on which the paste encapsulation resin is printed, it is difficult to control the extending area of the encapsulation resin flowing to the opposite side of the chip through a gap between the LSI chip and the device hole.
FIGS. 6A and 6B show a conventional TCP semiconductor device. FIG. 6A is a cross sectional view showing a state after encapsulation with a resin; FIG. 6B is a plan view showing a state before encapsulation with a resin. FIG. 6A is a cross sectional view taken along line B--B of FIG. 6B.
As is clear from FIGS. 6A and 6B, the connections of semiconductor chips mounted on TCP semiconductor devices have become complicated. The number of leads (e.g., electrodes) can vary significantly for each side of the chip.
In other words, formerly electrodes at each side were relatively uniformly arranged. However, recently very nonuniform arrangements have been employed. In addition, as a result of employing a multi-electrode system, the gap width between inner leads is getting narrower and narrower.
The conventional semiconductor device has a semiconductor chip in a device mounting hole 5 formed on a tape carrier 4. The center line 7 of device mounting hole 5 provided in tape carrier 4 coincides with the center line 6 of semiconductor chip 2 regardless of the number of conductor leads 3 connected with electrodes formed on semiconductor chip 2.
In the case of such a semiconductor device, resin encapsulation is usually carried out by dropping or applying a softened sealing resin (such as epoxy resins, silicone resins, polyimide resins and the like) to a front surface side of semiconductor chip 2. The encapsulation resin is thereby applied to the device mounting hole at the surface of semiconductor chip 2 through a region contributing to the outflow of resin. The outflow region is defined by the gap length of the device mounting hole (indicated with L.sub.1 and L.sub.2 in FIG. 6B) and the lead gap widths (indicated with W.sub.1 and W.sub.2 in FIG. 6B). The flowability and viscosity properties of the encapsulation resin cause the resin to cover the surface of semiconductor chip 2 and fill the whole device mounting hole 5.
Encapsulation resin 1 becomes a surface protective film for protecting the surface of the semiconductor chip. On the other hand, encapsulation resin 13 and 14 fills the device mounting hole 5 to suppress adverse influences coming from the rear surface and the side surface of semiconductor chip 2 and, in addition, maintains mechanical strength.
First edge side inner leads 33 extending from the first edge 53 of device mounting hole 5 to semiconductor chip 2 are arranged relatively sparsely, i.e. the gap width (W) is large (W=W.sub.1). In contrast, second edge side inner leads 34 extending from the second edge 54 opposite to first edge 53 to semiconductor chip 2 are arranged relatively densely, i.e. the gap width (W) is small (W=W.sub.2).
For simplification, in FIG. 6B the inner leads 33 at the first edge side are uniformly arranged, and the inner leads 34 at the second edge side are also uniformly arranged.
Designating the lead gap width, the gap length, and the number of lead gaps as W, L and N, respectively, the total area (S) of the regions contributing to the outflow of resin is represented by S=W.times.L.times.N. In the above, for simplification, the regions where the edges contact are excluded.
When the gap length of device mounting hole L.sub.1 at the first edge (53) side of device mounting hole 5 is 0.2 mm, the lead gap width W.sub.1 of inner leads 33 at the first edge side is 3.0 mm, and the number of lead gaps N.sub.1 is 5, the total area S.sub.1 of the regions contributing to outflow of resin at the first edge side is S.sub.1 =L.sub.1 .times.W.sub.1 .times.N.sub.1 =0.2.times.3.0.times.5=3.0 mm.sup.2.
When the gap length of device mounting hole L.sub.2 at the side of the second edge 54 of device mounting hole 5 is 0.2 mm, the lead gap width W.sub.2 of inner leads 34 at the second edge of the device mounting hole is 0.5 mm, and the number of lead gaps N.sub.2 is 11, the total area S.sub.2 of the regions contributing to outflow of resin at the second edge side is S.sub.2 =L.sub.2 .times.W.sub.2 .times.N.sub.2 =0.2.times.0.5.times.11=1.1 mm.sup.2.
That is, the ratio of total area of the regions contributing to the outflow of resin is S.sub.2 /S.sub.1 =1.1/3.0=0.367.
Since the ratio of S.sub.2 /S.sub.1 deviates from 1, there is a significant difference in the amount of resin supplied from the resin supplying surface side (the front surface of semiconductor chip 2) to the side surface portion of semiconductor chip 2 between the first edge 53 of device mounting hole 5 (where the arrangement of electrodes is sparse) and the second edge 54 of device mounting hole 5 (where the arrangement of electrodes is dense).
As a result, it is difficult to uniformly flow the encapsulation resin from the resin supplying surface to the side surface of semiconductor chip 2 and to make flat the surface of the resin 1 remaining at the surface to which the resin was applied, i.e. making the thickness of the layer of resin 1 uniform, and therefore, an intended sealing shape of the resin cannot be formed at the designated resin region. Consequentially, stable production is not possible.
In other words, the non-uniform outflow of resin results in forming a portion 13 where the encapsulation resin spreads too broadly and too thin and also a portion 14 where there is a gap due to insufficient supply of the resin. Therefore, the encapsulation becomes imbalanced at the right and the left sides.
As a result, the mechanical strength of the encapsulation cannot be sufficiently ensured. Such imbalance can cause cracks by mechanical stress.